All Item Include
3.1. Timer/ Counter Mode 0 : 13 bit Counter
Putting either Timer into Mode 0 makes it look like an 8048 Timer, which is an 8-bit Counter with a divide-by-32 prescaler. Figure 7 shows the Mode 0 operation as it applies to Timer 1. In this mode, the Timer register is configured as a 13-bit register. As the count rolls over from all 1s to all 0s, it sets the Timer interrupt flag TF1. The counted input is enabled to the Timer when TR1 = 1 and either GATE = 0 or INT1 = 1. (Setting GATE = 1 allows the Timer to be controlled by external input INT1, to facilitate pulse width measurements). TR1 is a control bit in the Special Function Register TCON (Figure 8). GATE is in TMOD.
Figure 3.1. Timer/Counter Mode 0: 13-Bit Counter
The 13-bit register consists of all 8 bits of TH1 and
the lower 5 bits of TL1. The upper 3 bits of TL1 are indeterminate and
should be ignored. Setting the run flag (TR1) does not clear the registers.
Mode 0 operation is the same for the Timer 0 as for Timer 1. Substitute
TR0, TF0, and INT0 for the corresponding Timer 1
By using Timer function, we can design a pulse generator and outputs data to port. as you see on figure 3.3.1., with frequency 1 Hz
Figure 3.1.1. A pulse generator from timer function
Figure 3.1.2. Pulse Periode 1 second
This program initialized counter/timer 1 to be a timer
operating in mode 0, that is a 13 bit timer. When the timer overflows,
the hardware sets the flag TF1. The program spends most of its time checking
whether the timer overflow flag TF0 is set. Note that in this mode, with
a 12 MHz crystal frequency, the timer overflows every 8192 microseconds.
Org 0h Start: Setb P0.0 ;P0.0 = 1 call Delay ;call delay time Clr P0.0 ;P0.0 = 0 Sjmp Start ;Looping Forever ; Delay: Mov R0,#0 ;R0 = 0 Mov TMOD,#00000000b ;mode 1, Timer 1 Load: Mov TH1, #00Ch ;TH1 = D8h Mov TL1, #078h ; TL1 = F0h Setb TR1 ; TR1 = 1, Start Running OFlow: JNB TF1, OFlow ; jump to OFlow if TF1 =0 Inc R0 ; R0 = R0+1 CJNE R0,#100,Load; Ret ; End